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Products - JTAG for OpenOCD

This IP core for LEON2 / LEON2-MT allows to control and debug the processor with a customized version of OpenOCD. It has been designed specifically to minimize communication overheads imposed by OpenOCD, namely the fact that OpenOCD limits the JTAG data register width to a maximum of 32 bits. Data transactions are protected with the CRC16 CCITT code. The core supports hardware reset of the connected CPU.